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stm32 /stm32h7 /STM32H757_CM4 /RCC /APB4RSTR

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Interpret as APB4RSTR

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https://regviz.com/r/stm32/stm32h7/STM32H742/RCC/APB4RSTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGRST)SYSCFGRST 0 (LPUART1RST)LPUART1RST 0 (SPI6RST)SPI6RST 0 (I2C4RST)I2C4RST 0 (LPTIM2RST)LPTIM2RST 0 (LPTIM3RST)LPTIM3RST 0 (LPTIM4RST)LPTIM4RST 0 (LPTIM5RST)LPTIM5RST 0 (COMP12RST)COMP12RST 0 (VREFRST)VREFRST 0 (SAI4RST)SAI4RST

Description

RCC APB4 Peripheral Reset Register

Fields

SYSCFGRST

SYSCFG block reset
LPUART1RST

LPUART1 block reset
SPI6RST

SPI6 block reset
I2C4RST

I2C4 block reset
LPTIM2RST

LPTIM2 block reset
LPTIM3RST

LPTIM3 block reset
LPTIM4RST

LPTIM4 block reset
LPTIM5RST

LPTIM5 block reset
COMP12RST

COMP12 Blocks Reset
VREFRST

VREF block reset
SAI4RST

SAI4 block reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32