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stm32 /stm32h7 /STM32H7B0 /ADC2 /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADEN)ADEN 0 (ADDIS)ADDIS 0 (ADSTART)ADSTART 0 (JADSTART)JADSTART 0 (ADSTP)ADSTP 0 (JADSTP)JADSTP 0 (BOOST)BOOST 0 (ADCALLIN)ADCALLIN 0 (LINCALRDYW1)LINCALRDYW1 0 (LINCALRDYW2)LINCALRDYW2 0 (LINCALRDYW3)LINCALRDYW3 0 (LINCALRDYW4)LINCALRDYW4 0 (LINCALRDYW5)LINCALRDYW5 0 (LINCALRDYW6)LINCALRDYW6 0 (ADVREGEN)ADVREGEN 0 (DEEPPWD)DEEPPWD 0 (ADCALDIF)ADCALDIF 0 (ADCAL)ADCAL

Description

ADC control register

Fields

ADEN

ADC enable
ADDIS

ADC disable
ADSTART

ADC group regular conversion start
JADSTART

ADC group injected conversion start
ADSTP

ADC group regular conversion stop
JADSTP

ADC group injected conversion stop
BOOST

Boost mode control
ADCALLIN

Linearity calibration
LINCALRDYW1

Linearity calibration ready Word 1
LINCALRDYW2

Linearity calibration ready Word 2
LINCALRDYW3

Linearity calibration ready Word 3
LINCALRDYW4

Linearity calibration ready Word 4
LINCALRDYW5

Linearity calibration ready Word 5
LINCALRDYW6

Linearity calibration ready Word 6
ADVREGEN

ADC voltage regulator enable
DEEPPWD

ADC deep power down enable
ADCALDIF

ADC differential mode for calibration
ADCAL

ADC calibration

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32