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stm32 /stm32h7 /STM32H7B0 /DBGMCU /APB1LFZ1

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Interpret as APB1LFZ1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2)TIM2 0 (TIM3)TIM3 0 (TIM4)TIM4 0 (TIM5)TIM5 0 (TIM6)TIM6 0 (TIM7)TIM7 0 (TIM12)TIM12 0 (TIM13)TIM13 0 (TIM14)TIM14 0 (LPTIM1)LPTIM1 0 (I2C1)I2C1 0 (I2C2)I2C2 0 (I2C3)I2C3

Description

DBGMCU APB1L peripheral freeze register

Fields

TIM2

TIM2 stop in debug
TIM3

TIM3 stop in debug
TIM4

TIM4 stop in debug
TIM5

TIM5 stop in debug
TIM6

TIM6 stop in debug
TIM7

TIM7 stop in debug
TIM12

TIM12 stop in debug
TIM13

TIM13 stop in debug
TIM14

TIM14 stop in debug
LPTIM1

LPTIM1 stop in debug
I2C1

I2C1 SMBUS timeout stop in debug
I2C2

I2C2 SMBUS timeout stop in debug
I2C3

I2C3 SMBUS timeout stop in debug

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32