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stm32 /stm32h7 /STM32H7B0 /DBGMCU /APB2FZ1

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Interpret as APB2FZ1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM1)TIM1 0 (TIM8)TIM8 0 (TIM15)TIM15 0 (TIM16)TIM16 0 (TIM17)TIM17

Description

DBGMCU APB2 peripheral freeze register

Fields

TIM1

TIM1 stop in debug
TIM8

TIM8 stop in debug
TIM15

TIM15 stop in debug
TIM16

TIM16 stop in debug
TIM17

TIM17 stop in debug

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32