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stm32 /stm32h7 /STM32H7B0 /EXTI /CPUPR2

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Interpret as CPUPR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PR49)PR49 0 (PR51)PR51

Description

EXTI pending register

Fields

PR49

Configurable event inputs x+32 Pending bit
PR51

Configurable event inputs x+32 Pending bit

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32