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stm32 /stm32h7 /STM32H7B0 /Flash /FLASH_OPTSR_PRG_

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Interpret as FLASH_OPTSR_PRG_

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BOR_LEV 0 (IWDG_SW)IWDG_SW 0 (NRST_STOP)NRST_STOP 0 (NRST_STDY)NRST_STDY 0RDP0 (VDDMMC_HSLV)VDDMMC_HSLV 0 (WDG_FZ_STOP)WDG_FZ_STOP 0 (IWDG_FZ_SDBY)IWDG_FZ_SDBY 0ST_RAM_SIZE 0 (SECURITY)SECURITY 0 (VDDIO_HSLV)VDDIO_HSLV 0 (SWAP_BANK_OPT)SWAP_BANK_OPT

Description

FLASH option status register

Fields

BOR_LEV

BOR reset level option configuration bits
IWDG_SW

IWDG1 option configuration bit
NRST_STOP

Option byte erase after D1 DStop option configuration bit
NRST_STDY

Option byte erase after D1 DStandby option configuration bit
RDP

Readout protection level option configuration byte
VDDMMC_HSLV

VDDMMC_HSLV
WDG_FZ_STOP

IWDG Stop mode freeze option configuration bit
IWDG_FZ_SDBY

IWDG Standby mode freeze option configuration bit
ST_RAM_SIZE

DTCM size select option configuration bits
SECURITY

Security option configuration bit
VDDIO_HSLV

VDDIO_HSLV
SWAP_BANK_OPT

Bank swapping option configuration bit

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32