Regviz

stm32 /stm32h7 /STM32H7B0 /GPIOA /AFRH

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Interpret as AFRH

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https://regviz.com/r/stm32/stm32h7/STM32H723/GPIOA/AFRH#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFSEL80AFSEL90AFSEL100AFSEL110AFSEL120AFSEL130AFSEL140AFSEL15

Description

GPIO alternate function high register

Fields

AFSEL8

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL9

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL10

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL11

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL12

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL13

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL14

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os
AFSEL15

[3:0]: Alternate function selection for port x pin y (y = 8…15) These bits are written by software to configure alternate function I/Os

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32