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stm32 /stm32h7 /STM32H7B0 /HRTIM_Common /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MSWU)MSWU 0 (TASWU)TASWU 0 (TBSWU)TBSWU 0 (TCSWU)TCSWU 0 (TDSWU)TDSWU 0 (TESWU)TESWU 0 (MRST)MRST 0 (TARST)TARST 0 (TBRST)TBRST 0 (TCRST)TCRST 0 (TDRST)TDRST 0 (TERST)TERST

Description

Control Register 2

Fields

MSWU

Master Timer Software update
TASWU

Timer A Software update
TBSWU

Timer B Software Update
TCSWU

Timer C Software Update
TDSWU

Timer D Software Update
TESWU

Timer E Software Update
MRST

Master Counter software reset
TARST

Timer A counter software reset
TBRST

Timer B counter software reset
TCRST

Timer C counter software reset
TDRST

Timer D counter software reset
TERST

Timer E counter software reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32