Regviz

stm32 /stm32h7 /STM32H7B0 /OCTOSPI2 /WTCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as WTCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h7/STM32H723/OCTOSPI1/WTCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DCYC

Description

write timing configuration register

Fields

DCYC

DCYC

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32