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stm32 /stm32h7 /STM32H7B0 /RAMECC /IER

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Interpret as IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GIE)GIE 0 (GECCSEIE_)GECCSEIE_ 0 (GECCDEIE)GECCDEIE 0 (GECCDEBWIE)GECCDEBWIE

Description

RAMECC interrupt enable register

Fields

GIE

Global interrupt enable
GECCSEIE_

Global ECC single error interrupt enable
GECCDEIE

Global ECC double error interrupt enable
GECCDEBWIE

Global ECC double error on byte write (BW) interrupt enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32