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stm32 /stm32h7 /STM32H7B0 /RCC /RCC_AHB3RSTR

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Interpret as RCC_AHB3RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MDMARST 0 (B_0x0)DMA2DRST 0 (B_0x0)JPGDECRST 0 (B_0x0)FMCRST 0 (B_0x0)OCTOSPI1RST 0 (B_0x0)SDMMC1RST 0 (B_0x0)OCTOSPI2RST 0 (B_0x0)OCTOSPIMRST 0 (B_0x0)OTFD1RST 0 (B_0x0)OTFD2RST 0 (B_0x0)GFXMMURST

FMCRST=B_0x0, MDMARST=B_0x0, DMA2DRST=B_0x0, OTFD1RST=B_0x0, JPGDECRST=B_0x0, OCTOSPI1RST=B_0x0, OCTOSPI2RST=B_0x0, SDMMC1RST=B_0x0, OTFD2RST=B_0x0, OCTOSPIMRST=B_0x0, GFXMMURST=B_0x0

Fields

MDMARST

MDMA block reset Set and reset by software.

0 (B_0x0): does not reset MDMA block (default after reset)

1 (B_0x1): resets MDMA block
DMA2DRST

DMA2D block reset Set and reset by software.

0 (B_0x0): does not reset DMA2D block (default after reset)

1 (B_0x1): resets DMA2D block
JPGDECRST

JPGDEC block reset Set and reset by software.

0 (B_0x0): does not reset JPGDEC block (default after reset)

1 (B_0x1): resets JPGDEC block
FMCRST

FMC block reset Set and reset by software.

0 (B_0x0): does not reset FMC block (default after reset)

1 (B_0x1): resets FMC block
OCTOSPI1RST

OCTOSPI1 and OCTOSPI1 delay blocks reset Set and reset by software.

0 (B_0x0): does not reset OCTOSPI1 and OCTOSPI1 delay blocks (default after reset)

1 (B_0x1): resets OCTOSPI1 and OCTOSPI1 delay blocks
SDMMC1RST

SDMMC1 and SDMMC1 delay blocks reset Set and reset by software.

0 (B_0x0): does not reset SDMMC1 and SDMMC1 delay blocks (default after reset)

1 (B_0x1): resets SDMMC1 and SDMMC1 delay blocks
OCTOSPI2RST

OCTOSPI2 and OCTOSPI2 delay block reset Set and reset by software

0 (B_0x0): does not reset the OCTOSPI2 and OCTOSPI2 delay block (default after reset)

1 (B_0x1): resets the OCTOSPI2 and OCTOSPI2 delay block
OCTOSPIMRST

OCTOSPIM reset Set and reset by software

0 (B_0x0): does not reset the OCTOSPIM (default after reset)

1 (B_0x1): resets the OCTOSPIM
OTFD1RST

OTFD1 reset Set and reset by software Take care that resetting the OTFD means loosing the decryption key loaded during secure boot.

0 (B_0x0): does not reset the OTFD1 (default after reset)

1 (B_0x1): resets the OTFD1
OTFD2RST

OTFD2 reset Set and reset by software Take care that resetting the OTFD means loosing the decryption key loaded during secure boot.

0 (B_0x0): does not reset the OTFD2 (default after reset)

1 (B_0x1): resets the OTFD2
GFXMMURST

GFXMMU reset Set and reset by software

0 (B_0x0): does not reset the GFXMMU (default after reset)

1 (B_0x1): resets the GFXMMU

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32