MDIOSLPEN=B_0x0, CRSLPEN=B_0x0, FDCANLPEN=B_0x0, OPAMPLPEN=B_0x0, SWPMILPEN=B_0x0
| CRSLPEN | clock recovery system peripheral clock enable during CSleep mode Set and reset by software. 0 (B_0x0): CRS peripheral clock disabled during CSleep mode 1 (B_0x1): CRS peripheral clock enabled during CSleep mode (default after reset) |
| SWPMILPEN | SWPMI peripheral clocks enable during CSleep mode Set and reset by software. The peripheral clocks of the SWPMI are the kernel clock selected by SWPMISEL and provided to swpmi_ker_ck input, and the rcc_pclk1 bus interface clock. 0 (B_0x0): SWPMI peripheral clocks disabled during CSleep mode 1 (B_0x1): SWPMI peripheral clocks enabled during CSleep mode (default after reset) |
| OPAMPLPEN | OPAMP peripheral clock enable during CSleep mode Set and reset by software. 0 (B_0x0): OPAMP peripheral clock disabled during CSleep mode 1 (B_0x1): OPAMP peripheral clock enabled during CSleep mode (default after reset) |
| MDIOSLPEN | MDIOS peripheral clock enable during CSleep mode Set and reset by software. 0 (B_0x0): MDIOS peripheral clock disabled during CSleep mode 1 (B_0x1): MDIOS peripheral clock enabled during CSleep mode (default after reset) |
| FDCANLPEN | FDCAN peripheral clocks enable during CSleep mode Set and reset by software. The peripheral clocks of the FDCAN are: the kernel clock selected by FDCANSEL and provided to fdcan_clk input, and the rcc_pclk1 bus interface clock. 0 (B_0x0): FDCAN peripheral clocks disabled during CSleep mode 1 (B_0x1): FDCAN peripheral clocks enabled during CSleep mode (default after reset) |