LTDCLPEN=B_0x0, WWDGLPEN=B_0x0
| LTDCLPEN | LTDC peripheral clock enable during CSleep mode Set and reset by software. The LTDC peripheral clocks are the kernel clock provided to ltdc_ker_ck input and the rcc_pclk3 bus interface clock. 0 (B_0x0): LTDC clock disabled during CSleep mode 1 (B_0x1): LTDC clock provided to the LTDC during CSleep mode (default after reset) |
| WWDGLPEN | WWDG clock enable during CSleep mode Set and reset by software. 0 (B_0x0): WWDG clock disable during CSleep mode 1 (B_0x1): WWDG clock enabled during CSleep mode (default after reset) |