LPTIM1SEL=B_0x0, USART234578SEL=B_0x0, USBSEL=B_0x0, CECSEL=B_0x0, I2C123SEL=B_0x0, RNGSEL=B_0x0, USART16910SEL=B_0x0
RCC CPU domain kernel clock configuration register
| USART234578SEL | USART2/3, UART4,5, 7 and 8 (APB1) kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 2 (B_0x2): pll3_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |
| USART16910SEL | USART1, 6, 9 and 10 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk2 selected as kernel clock (default after reset) 1 (B_0x1): pll2_q_ck selected as kernel clock 2 (B_0x2): pll3_q_ck selected as kernel clock 3 (B_0x3): hsi_ker_ck selected as kernel clock 4 (B_0x4): csi_ker_ck selected as kernel clock 5 (B_0x5): lse_ck selected as kernel clock |
| RNGSEL | RNG kernel clock source selection Set and reset by software. 0 (B_0x0): hsi48_ck selected as kernel clock (default after reset) 1 (B_0x1): pll1_q_ck selected as kernel clock 2 (B_0x2): lse_ck selected as kernel clock 3 (B_0x3): lsi_ck selected as kernel clock |
| I2C123SEL | I2C1,2,3 kernel clock source selection Set and reset by software. 0 (B_0x0): rcc_pclk1 selected as kernel clock (default after reset) 1 (B_0x1): pll3_r_ck selected as kernel clock 2 (B_0x2): hsi_ker_ck selected as kernel clock 3 (B_0x3): csi_ker_ck selected as kernel clock |
| USBSEL | USBOTG 1 and 2 kernel clock source selection Set and reset by software. 0 (B_0x0): Disable the kernel clock (default after reset) 1 (B_0x1): pll1_q_ck selected as kernel clock 2 (B_0x2): pll3_q_ck selected as kernel clock 3 (B_0x3): hsi48_ck selected as kernel clock |
| CECSEL | HDMI-CEC kernel clock source selection Set and reset by software. 0 (B_0x0): lse_ck selected as kernel clock (default after reset) 1 (B_0x1): lsi_ck selected as kernel clock 2 (B_0x2): csi_ker_ck divided by 122 selected as kernel clock 3 (B_0x3): reserved, the kernel clock is disabled |
| LPTIM1SEL | LPTIM1 kernel clock source selection Set and reset by software. others: reserved, the kernel clock is disabled 0 (B_0x0): rcc_pclk1 selected as kernel peripheral clock (default after reset) 1 (B_0x1): pll2_p_ck selected as kernel peripheral clock 2 (B_0x2): pll3_r_ck selected as kernel peripheral clock 3 (B_0x3): lse_ck selected as kernel peripheral clock 4 (B_0x4): lsi_ck selected as kernel peripheral clock 5 (B_0x5): per_ck selected as kernel peripheral clock |