AWDIE=B_0x0, SCDIE=B_0x0, CKABIE=B_0x0, ROVRIE=B_0x0, JOVRIE=B_0x0, JEOCIE=B_0x0, REOCIE=B_0x0
| JEOCIE | Injected end of conversion interrupt enable Please see the explanation of JEOCF in DFSDM_FLTxISR. 0 (B_0x0): Injected end of conversion interrupt is disabled 1 (B_0x1): Injected end of conversion interrupt is enabled |
| REOCIE | Regular end of conversion interrupt enable Please see the explanation of REOCF in DFSDM_FLTxISR. 0 (B_0x0): Regular end of conversion interrupt is disabled 1 (B_0x1): Regular end of conversion interrupt is enabled |
| JOVRIE | Injected data overrun interrupt enable Please see the explanation of JOVRF in DFSDM_FLTxISR. 0 (B_0x0): Injected data overrun interrupt is disabled 1 (B_0x1): Injected data overrun interrupt is enabled |
| ROVRIE | Regular data overrun interrupt enable Please see the explanation of ROVRF in DFSDM_FLTxISR. 0 (B_0x0): Regular data overrun interrupt is disabled 1 (B_0x1): Regular data overrun interrupt is enabled |
| AWDIE | Analog watchdog interrupt enable Please see the explanation of AWDF in DFSDM_FLTxISR. 0 (B_0x0): Analog watchdog interrupt is disabled 1 (B_0x1): Analog watchdog interrupt is enabled |
| SCDIE | Short-circuit detector interrupt enable Please see the explanation of SCDF[7:0] in DFSDM_FLTxISR. Note: SCDIE is present only in DFSDM_FLT0CR2 register (filter x=0) 0 (B_0x0): short-circuit detector interrupt is disabled 1 (B_0x1): short-circuit detector interrupt is enabled |
| CKABIE | Clock absence interrupt enable Please see the explanation of CKABF[7:0] in DFSDM_FLTxISR. Note: CKABIE is present only in DFSDM_FLT0CR2 register (filter x=0) 0 (B_0x0): Detection of channel input clock absence interrupt is disabled 1 (B_0x1): Detection of channel input clock absence interrupt is enabled |
| EXCH | Extremes detector channel selection These bits select the input channels to be taken by the Extremes detector. EXCH[y] = 0: Extremes detector does not accept data from channel y EXCH[y] = 1: Extremes detector accepts data from channel y |
| AWDCH | Analog watchdog channel selection These bits select the input channel to be guarded continuously by the analog watchdog. AWDCH[y] = 0: Analog watchdog is disabled on channel y AWDCH[y] = 1: Analog watchdog is enabled on channel y |