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stm32 /stm32h7 /STM32H7B3 /DFSDM1 /DFSDM_FLT5AWCFR

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Interpret as DFSDM_FLT5AWCFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CLRAWLTF0CLRAWHTF

Fields

CLRAWLTF

Clear the analog watchdog low threshold flag CLRAWLTF[y]=0: Writing '0’ has no effect CLRAWLTF[y]=1: Writing '1’ to position y clears the corresponding AWLTF[y] bit in the DFSDM_FLTxAWSR register
CLRAWHTF

Clear the analog watchdog high threshold flag CLRAWHTF[y]=0: Writing '0’ has no effect CLRAWHTF[y]=1: Writing '1’ to position y clears the corresponding AWHTF[y] bit in the DFSDM_FLTxAWSR register

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32