TSSTSSEL=B_0x0, ACTPHYSEL=B_0x0
HW feature 0 register
MIISEL | 10 or 100 Mbps Support This bit is set to 1 when 10/100 Mbps is selected as operating mode. |
GMIISEL | 1000 Mbps Support This bit is set to 1 when 1000 Mbps is selected as operating mode. |
HDSEL | Half-duplex Support This bit is set to 1 when the Half-duplex mode is selected |
PCSSEL | PCS Registers (TBI, SGMII, or RTBI PHY interface) This bit is set to 1 when the TBI, SGMII, or RTBI PHY interface option is selected |
VLHASH | VLAN Hash Filter Selected This bit is set to 1 when the Enable VLAN Hash Table Based Filtering option is selected |
SMASEL | SMA (MDIO) Interface This bit is set to 1 when the Enable Station Management (MDIO Interface) option is selected |
RWKSEL | PMT Remote Wakeup Packet Enable This bit is set to 1 when the Enable Remote wakeup Packet Detection option is selected |
MGKSEL | PMT Magic Packet Enable This bit is set to 1 when the Enable Magic Packet Detection option is selected |
MMCSEL | RMON Module Enable This bit is set to 1 when the Enable MAC management counters (MMC) option is selected |
ARPOFFSEL | ARP Offload Enabled This bit is set to 1 when the Enable IPv4 ARP Offload option is selected |
TSSEL | IEEE 1588-2008 Timestamp Enabled This bit is set to 1 when the Enable IEEE 1588 Timestamp Support option is selected |
EEESEL | Energy Efficient Ethernet Enabled This bit is set to 1 when the Enable Energy Efficient Ethernet (EEE) option is selected |
TXCOESEL | Transmit Checksum Offload Enabled This bit is set to 1 when the Enable Transmit TCP/IP Checksum Insertion option is selected |
RXCOESEL | Receive Checksum Offload Enabled This bit is set to 1 when the Enable Receive TCP/IP Checksum Check option is selected |
ADDMACADRSEL | MAC Addresses 1-31 Selected This bit is set to 1 when the Enable Additional 1-31 MAC Address Registers option is selected |
MACADR32SEL | MAC Addresses 32-63 Selected This bit is set to 1 when the Enable Additional 32 MAC Address Registers (32-63) option is selected |
MACADR64SEL | MAC Addresses 64-127 Selected This bit is set to 1 when the Enable Additional 64 MAC Address Registers (64-127) option is selected |
TSSTSSEL | Timestamp System Time Source This bit indicates the source of the Timestamp system time: This bit is set to 1 when the Enable IEEE 1588 Timestamp Support option is selected 0 (B_0x0): Reserved, must not be used 1 (B_0x1): Internal 2 (B_0x2): External 3 (B_0x3): Both |
SAVLANINS | Source Address or VLAN Insertion Enable This bit is set to 1 when the Enable SA and VLAN Insertion on Tx option is selected |
ACTPHYSEL | Active PHY Selected When you have multiple PHY interfaces in your configuration, this field indicates the sampled value of phy_intf_sel_i during reset de-assertion: Others: Reserved, must not be used 0 (B_0x0): GMII or MII 1 (B_0x1): RGMII 2 (B_0x2): SGMII 3 (B_0x3): TBI 4 (B_0x4): RMII 5 (B_0x5): RTBI 6 (B_0x6): SMII |