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stm32 /stm32h7rs /STM32H7R /ETH /ETH_MACTSIACR

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Interpret as ETH_MACTSIACR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OSTIAC

Description

Timestamp Ingress asymmetric correction register

Fields

OSTIAC

One-Step Timestamp Ingress Asymmetry Correction This field contains the ingress path asymmetry value to be added to correctionField of Pdelay_Resp PTP packet. The programmed value should be in units of nanoseconds and multiplied by 2^16. For example, 2.5 ns is represented as 0x00028000. The value can also be negative, which is represented in 2’s complement form with bit 31 representing the sign bit.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32