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stm32 /stm32h7rs /STM32H7S /DMA2D /DMA2D_IFCR

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Interpret as DMA2D_IFCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CTEIF)CTEIF 0 (CTCIF)CTCIF 0 (CTWIF)CTWIF 0 (CAECIF)CAECIF 0 (CCTCIF)CCTCIF 0 (CCEIF)CCEIF

Description

DMA2D interrupt flag clear register

Fields

CTEIF

Clear transfer error interrupt flag Programming this bit to 1 clears the TEIF flag in DMA2D_ISR.
CTCIF

Clear transfer complete interrupt flag Programming this bit to 1 clears the TCIF flag in DMA2D_ISR.
CTWIF

Clear transfer watermark interrupt flag Programming this bit to 1 clears the TWIF flag in DMA2D_ISR.
CAECIF

Clear CLUT access error interrupt flag Programming this bit to 1 clears the CAEIF flag in DMA2D_ISR.
CCTCIF

Clear CLUT transfer complete interrupt flag Programming this bit to 1 clears the CTCIF flag in DMA2D_ISR.
CCEIF

Clear configuration error interrupt flag Programming this bit to 1 clears the CEIF flag in DMA2D_ISR.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32