stm32 /stm32h7rs /STM32H7S /ETH /ETH_DMAISR

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Interpret as ETH_DMAISR

Description

Interrupt status register

Fields

DC0IS	DMA Channel Interrupt Status This bit indicates an interrupt event in DMA Channel. To reset this bit to 0, the software must read the corresponding register in DMA Channel to get the exact cause of the interrupt and clear its source.
MTLIS	MTL Interrupt Status This bit indicates an interrupt event in the MTL. To reset this bit to 1’b0, the software must read the corresponding register in the MTL to get the exact cause of the interrupt and clear its source.
MACIS	MAC Interrupt Status This bit indicates an interrupt event in the MAC. To reset this bit to 1’b0, the software must read the corresponding register in the MAC to get the exact cause of the interrupt and clear its source.

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