WTO=B_0x0
Watchdog timeout register
| WTO | Watchdog Timeout When the PWE bit is set and the WD bit of the Operating mode configuration register (ETH_MACCR) register is reset, this field is used as watchdog timeout for a received packet. If the length of a received packet exceeds the value of this field, such packet is terminated and declared as an error packet. Encoding is as follows: … Note: When the PWE bit is set, the value in this field should be more than 1,522 (0x05F2). Otherwise, the IEEE 802.3-specified valid tagged packets are declared as error packets and then dropped. 0 (B_0x0): 2 Kbytes 1 (B_0x1): 3 Kbytes 2 (B_0x2): 4 Kbytes 3 (B_0x3): 5 Kbytes 12 (B_0xC): 14 Kbytes 13 (B_0xD): 15 Kbytes 14 (B_0xE): 16383 Bytes 15 (B_0xF): Reserved, must not be used |
| PWE | Programmable Watchdog Enable When this bit is set and the WD bit of the Operating mode configuration register (ETH_MACCR) register is reset, the WTO field is used as watchdog timeout for a received packet. When this bit is cleared, the watchdog timeout for a received packet is controlled by setting of WD and JE bits in Operating mode configuration register (ETH_MACCR) register. |