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stm32 /stm32h7rs /STM32H7S /EXTI /EXTI_IMR3

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Interpret as EXTI_IMR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MR77

MR77=B_0x0

Description

EXTI interrupt mask register

Fields

MR77

CPU interrupt mask on direct event input x+64

0 (B_0x0): Interrupt request from line x is masked

1 (B_0x1): Interrupt request from line x is unmasked

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32