OPTERRIE=B_0x0, PG_OPT=B_0x0, OPTLOCK=B_0x0, KVEIE=B_0x0, KTEIE=B_0x0
FLASH options control register
| OPTLOCK | Options lock When this bit is set write to all other bits in this register, and write to OTP words, option bytes and option bytes keys control registers, are ignored. Clearing this bit requires the correct write sequence to FLASH_OPTKEYR register (see this register for details). If a wrong sequence is executed, or the unlock sequence is performed twice, this bit remains locked until next system reset. During the write access to set LOCK bit from 0 to 1, it is possible to change the other bits of this register. 0 (B_0x0): OTP words, FLASH_OPTCR, FLASH_OBKCR and FLASH_xxSRP registers are unlocked 1 (B_0x1): Writes to OTP words, FLASH_OBKCR, FLASH_xxSRP and to other bits than OPTLOCK in FLASH_OPTCR, are ignored |
| PG_OPT | Program options 0 (B_0x0): Update operations to user option bytes and option byte keys do not start 1 (B_0x1): Write operation to user option bytes and option byte keys is enabled |
| KVEIE | Key valid error interrupt enable bit This bit controls if an interrupt has to be generated when KVEF is set in FLASH_OPTISR. 0 (B_0x0): no interrupt is generated when a key valid error occurs 1 (B_0x1): an interrupt is generated when a key valid error occurs |
| KTEIE | Key transfer error interrupt enable bit This bit controls if an interrupt has to be generated when KTEF is set in FLASH_OPTISR. 0 (B_0x0): no interrupt is generated when a key transfer error occurs 1 (B_0x1): an interrupt is generated when a key transfer error occurs |
| OPTERRIE | Option byte change error interrupt enable bit This bit controls if an interrupt has to be generated when an error occurs during an option byte change. 0 (B_0x0): no interrupt is generated when an error occurs during an option byte change 1 (B_0x1): an interrupt is generated when and error occurs during an option byte change. |