DATATYPE=B_0x0, LKEY=B_0x0, DMAE=B_0x0, MODE=B_0x0, ALGO=B_0x0, MDMAT=B_0x0
HASH control register
| INIT | Initialize message digest calculation Writing this bit to 1 resets the hash processor core, so that the HASH is ready to compute the message digest of a new message. Writing this bit to 0 has no effect. Reading this bit always returns 0. |
| DMAE | DMA enable After this bit is set, it is cleared by hardware while the last data of the message is written into the hash processor. Setting this bit to 0 while a DMA transfer is ongoing does not abort the current transfer. Instead, the DMA interface of the HASH remains internally enabled until the transfer is completed or INIT is written to 1. Setting INIT bit to 1 does not clear DMAE bit. 0 (B_0x0): DMA transfers disabled 1 (B_0x1): DMA transfers enabled. A DMA request is sent as soon as the hash core is ready to receive data. |
| DATATYPE | Data type selection This bitfield defines the format of the data entered into the HASH_DIN register: 0 (B_0x0): 32-bit data. The data written into HASH_DIN are directly used by the HASH processing, without reordering. 1 (B_0x1): 16-bit data or half-word. The data written into HASH_DIN are considered as two half-words, and are swapped before being used by the HASH processing. 2 (B_0x2): 8-bit data or bytes. The data written into HASH_DIN are considered as four bytes, and are swapped before being used by the HASH processing. 3 (B_0x3): bit data or bit string. The data written into HASH_DIN are considered as 32 bits (1st bit of the string at position 0), and are swapped before being used by the HASH processing (1st bit of the string at position 31). |
| MODE | Mode selection This bit selects the normal or the keyed HMAC mode for the selected algorithm: This selection is only taken into account when the INIT bit is set. Changing this bit during a computation has no effect. 0 (B_0x0): Hash mode selected 1 (B_0x1): HMAC mode selected. LKEY bit must be set if the key being used is longer than the algorithm block size. |
| NBW | Number of words already pushed Refer to NBWP[3:0] bitfield of HASH_SR for a description of NBW[3:0] bitfield. This bit is read-only. |
| DINNE | DIN not empty Refer to DINNE bit of HASH_SR for a description of DINNE bit. This bit is read-only. |
| MDMAT | Multiple DMA transfers This bit is set when hashing large files when multiple DMA transfers are needed. 0 (B_0x0): DCAL is automatically set at the end of a DMA transfer. 1 (B_0x1): DCAL is not automatically set at the end of a DMA transfer. |
| LKEY | Long key selection The application must set this bit if the HMAC key is greater than the block size corresponding to the hash algorithm (see Table 280: Information on supported hash algorithms for details). For example the block size is 64 bytes for SHA2-256. This selection is only taken into account when the INIT and MODE bits are set (HMAC mode selected). Changing this bit during a computation has no effect. 0 (B_0x0): HMAC key is shorter or equal to the block size (short key). The actual key value written in HASH_DIN is used during the HMAC computation. 1 (B_0x1): HMAC key is longer than the block size (long key). The hash of the key is used instead of the real key during the HMAC computation. |
| ALGO | Algorithm selection These bits select the hash algorithm: This selection is only taken into account when the INIT bit is set. Changing this bitfield during a computation has no effect. When the ALGO bitfield is updated and INIT bit is set, NBWE in HASH_SR is automatically updated to 0x11. 0 (B_0x0): SHA-1 1 (B_0x1): FIELD Reserved 2 (B_0x2): SHA2-224 3 (B_0x3): SHA2-256 12 (B_0xC): SHA2-384 13 (B_0xD): SHA2-512/224 14 (B_0xE): SHA2-512/256 15 (B_0xF): SHA2-512 |