UEIE=B_0x0, REPOKIE=B_0x0, ARRMIE=B_0x0, CC1IE=B_0x0, DOWNIE=B_0x0, UPIE=B_0x0, ARROKIE=B_0x0, EXTTRIGIE=B_0x0, CMP1OKIE=B_0x0
LPTIM4 interrupt enable register
| CC1IE | Capture/compare 1 interrupt enable 0 (B_0x0): Capture/compare 1 interrupt disabled 1 (B_0x1): Capture/compare 1 interrupt enabled |
| ARRMIE | Autoreload match Interrupt Enable 0 (B_0x0): ARRM interrupt disabled 1 (B_0x1): ARRM interrupt enabled |
| EXTTRIGIE | External trigger valid edge Interrupt Enable 0 (B_0x0): EXTTRIG interrupt disabled 1 (B_0x1): EXTTRIG interrupt enabled |
| CMP1OKIE | Compare register 1 update OK interrupt enable 0 (B_0x0): CMPOK register 1 interrupt disabled 1 (B_0x1): CMPOK register 1 interrupt enabled |
| ARROKIE | Autoreload register update OK Interrupt Enable 0 (B_0x0): ARROK interrupt disabled 1 (B_0x1): ARROK interrupt enabled |
| UPIE | Direction change to UP Interrupt Enable Note: If the LPTIM does not support encoder mode feature, this bit is reserved. Refer to Section 26.3. 0 (B_0x0): UP interrupt disabled 1 (B_0x1): UP interrupt enabled |
| DOWNIE | Direction change to down Interrupt Enable Note: If the LPTIM does not support encoder mode feature, this bit is reserved. Refer to Section 26.3. 0 (B_0x0): DOWN interrupt disabled 1 (B_0x1): DOWN interrupt enabled |
| UEIE | Update event interrupt enable 0 (B_0x0): Update event interrupt disabled 1 (B_0x1): Update event interrupt enabled |
| REPOKIE | Repetition register update OK interrupt Enable 0 (B_0x0): Repetition register update OK interrupt disabled 1 (B_0x1): Repetition register update OK interrupt enabled |