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stm32 /stm32h7rs /STM32H7S /LTDC /LTDC_SSCR

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Interpret as LTDC_SSCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0VSH0HSW

Description

LTDC synchronization size configuration register

Fields

VSH

vertical synchronization height (in units of horizontal scan line) These bits define the vertical Synchronization height minus 1. It represents the number of horizontal synchronization lines.
HSW

horizontal synchronization width (in units of pixel clock period) These bits define the number of Horizontal Synchronization pixel minus 1.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32