PERSCHIVL=B_0x0, PFIVL=B_0x0, DSPD=B_0x0, ERRATIM=B_0x0, NZLSOHSK=B_0x0
OTG device configuration register
| DSPD | Device speed Indicates the speed at which the application requires the core to enumerate, or the maximum speed the application can support. However, the actual bus speed is determined only after the chirp sequence is completed, and is based on the speed of the USB host to which the core is connected. 0 (B_0x0): High speed 1 (B_0x1): Full speed 2 (B_0x2): FIELD Reserved 3 (B_0x3): FIELD Reserved |
| NZLSOHSK | Non-zero-length status OUT handshake The application can use this field to select the handshake the core sends on receiving a nonzero-length data packet during the OUT transaction of a control transfers status stage. 0 (B_0x0): Send the received OUT packet to the application (zero-length or nonzero-length) and send a handshake based on the NAK and STALL bits for the endpoint in the device endpoint control register. 1 (B_0x1): Send a STALL handshake on a nonzero-length status OUT transaction and do not send the received OUT packet to the application. |
| DAD | Device address The application must program this field after every SetAddress control command. |
| PFIVL | Periodic frame interval Indicates the time within a frame at which the application must be notified using the end of periodic frame interrupt. This can be used to determine if all the isochronous traffic for that frame is complete. 0 (B_0x0): 80% of the frame interval 1 (B_0x1): 85% of the frame interval 2 (B_0x2): 90% of the frame interval 3 (B_0x3): 95% of the frame interval |
| ERRATIM | Erratic error interrupt mask 0 (B_0x0): Early suspend interrupt is generated on erratic error 1 (B_0x1): Mask early suspend interrupt on erratic error |
| PERSCHIVL | Periodic schedule interval This field specifies the amount of time the Internal DMA engine must allocate for fetching periodic IN endpoint data. Based on the number of periodic endpoints, this value must be specified as 25, 50 or 75% of the (micro) frame. When any periodic endpoints are active, the internal DMA engine allocates the specified amount of time in fetching periodic IN endpoint data When no periodic endpoint is active, then the internal DMA engine services nonperiodic endpoints, ignoring this field After the specified time within a (micro) frame, the DMA switches to fetching nonperiodic endpoints 0 (B_0x0): 25% of (micro)frame 1 (B_0x1): 50% of (micro)frame 2 (B_0x2): 75% of (micro)frame 3 (B_0x3): FIELD Reserved |