stm32 /stm32h7rs /STM32H7S /OTG_HS /OTG_DCTL

Remote wakeup signaling When the application sets this bit, the core initiates remote signaling to wake up the USB host. The application must set this bit to instruct the core to exit the suspend state. As specified in the USB 2.0 specification, the application must clear this bit 1 ms to 15 ms after setting it. If LPM is enabled and the core is in the L1 (sleep) state, when the application sets this bit, the core initiates L1 remote signaling to wake up the USB host. The application must set this bit to instruct the core to exit the sleep state. As specified in the LPM specification, the hardware automatically clears this bit 50 s (T_{L1DevDrvResume}) after being set by the application. The application must not set this bit when bRemoteWake from the previous LPM transaction is zero (refer to REMWAKE bit in GLPMCFG register).

Soft disconnect The application uses this bit to signal the USB OTG core to perform a soft disconnect. As long as this bit is set, the host does not see that the device is connected, and the device does not receive signals on the USB. The core stays in the disconnected state until the application clears this bit.

0 (B_0x0): Normal operation. When this bit is cleared after a soft disconnect, the core generates a device connect event to the USB host. When the device is reconnected, the USB host restarts device enumeration.

1 (B_0x1): The core generates a device disconnect event to the USB host.

Global IN NAK status

0 (B_0x0): A handshake is sent out based on the data availability in the transmit FIFO.

1 (B_0x1): A NAK handshake is sent out on all non-periodic IN endpoints, irrespective of the data availability in the transmit FIFO.

Global OUT NAK status

0 (B_0x0): A handshake is sent based on the FIFO status and the NAK and STALL bit settings.

1 (B_0x1): No data is written to the Rx FIFO, irrespective of space availability. Sends a NAK handshake on all packets, except on SETUP transactions. All isochronous OUT packets are dropped.

Test control Others: Reserved

0 (B_0x0): Test mode disabled

1 (B_0x1): Test_J mode

2 (B_0x2): Test_K mode

3 (B_0x3): Test_SE0_NAK mode

4 (B_0x4): Test_Packet mode

5 (B_0x5): Test_Force_Enable

Set global IN NAK Writing 1 to this field sets the Global non-periodic IN NAK.The application uses this bit to send a NAK handshake on all non-periodic IN endpoints. The application must set this bit only after making sure that the Global IN NAK effective bit in the core interrupt register (GINAKEFF bit in OTG_GINTSTS) is cleared.

Clear global IN NAK Writing 1 to this field clears the Global IN NAK.

Set global OUT NAK Writing 1 to this field sets the Global OUT NAK. The application uses this bit to send a NAK handshake on all OUT endpoints. The application must set the this bit only after making sure that the Global OUT NAK effective bit in the core interrupt register (GONAKEFF bit in OTG_GINTSTS) is cleared.

Clear global OUT NAK Writing 1 to this field clears the Global OUT NAK.

Power-on programming done The application uses this bit to indicate that register programming is completed after a wakeup from power down mode.

Deep sleep BESL reject Core rejects LPM request with BESL value greater than BESL threshold programmed. NYET response is sent for LPM tokens with BESL value greater than BESL threshold. By default, the deep sleep BESL reject feature is disabled.