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stm32 /stm32h7rs /STM32H7S /OTG_HS /OTG_GRXSTSR_HOST

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Interpret as OTG_GRXSTSR_HOST

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CHNUM0BCNT0 (B_0x0)DPID 0PKTSTS

DPID=B_0x0

Description

OTG receive status debug read register

Fields

CHNUM

Channel number Indicates the channel number to which the current received packet belongs.
BCNT

Byte count Indicates the byte count of the received IN data packet.
DPID

Data PID Indicates the data PID of the received packet

0 (B_0x0): DATA0

1 (B_0x1): DATA2

2 (B_0x2): DATA1

3 (B_0x3): MDATA
PKTSTS

Packet status Indicates the status of the received packet Others: Reserved

2 (B_0x2): IN data packet received

3 (B_0x3): IN transfer completed (triggers an interrupt)

5 (B_0x5): Data toggle error (triggers an interrupt)

7 (B_0x7): Channel halted (triggers an interrupt)

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32