stm32 /stm32h7rs /STM32H7S /OTG_HS /OTG_HCINT2

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Interpret as OTG_HCINT2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XFRC)XFRC 0 (CHH)CHH 0 (AHBERR)AHBERR 0 (STALL)STALL 0 (NAK)NAK 0 (ACK)ACK 0 (NYET)NYET 0 (TXERR)TXERR 0 (BBERR)BBERR 0 (FRMOR)FRMOR 0 (DTERR)DTERR

Description

OTG host channel 2 interrupt register

Fields

XFRC

Transfer completed. Transfer completed normally without any errors.

CHH

Channel halted. Indicates the transfer completed abnormally either because of any USB transaction error or in response to disable request by the application.

AHBERR

AHB error This error is generated only in Internal DMA mode when an AHB error occurs during an AHB read/write operation. The application can read the corresponding DMA channel address register to get the error address.

STALL

STALL response received interrupt.

NAK

NAK response received interrupt.

ACK

ACK response received/transmitted interrupt.

NYET

Not yet ready response received interrupt.

TXERR

Transaction error. Indicates one of the following errors occurred on the USB. CRC check failure Timeout Bit stuff error False EOP

BBERR

Babble error.

FRMOR

Frame overrun.

DTERR

Data toggle error.

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