Regviz

stm32 /stm32h7rs /STM32H7S /OTG_HS /OTG_HNPTXFSIZ_DEVICE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as OTG_HNPTXFSIZ_DEVICE

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h7rs/STM32H7R/OTG_HS/OTG_HNPTXFSIZ_DEVICE#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TX0FSA0TX0FD

Description

OTG host non-periodic transmit FIFO size register [alternate]

Fields

TX0FSA

Endpoint 0 transmit RAM start address This field configures the memory start address for the endpoint 0 transmit FIFO RAM.
TX0FD

Endpoint 0 Tx FIFO depth This value is in terms of 32-bit words. Minimum value is 16 Programmed values must respect the available FIFO memory allocation and must not exceed the power-on value.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32