Regviz

stm32 /stm32h7rs /STM32H7S /PSSI /PSSI_ICR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PSSI_ICR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H562/PSSI/PSSI_ICR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OVR_ISC)OVR_ISC

Description

PSSI interrupt clear register

Fields

OVR_ISC

Data buffer overrun/underrun interrupt status clear Writing this bit to 1 clears the OVR_RIS bit in PSSI_RIS.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32