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stm32 /stm32h7rs /STM32H7S /PSSI /PSSI_IER

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Interpret as PSSI_IER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)OVR_IE

OVR_IE=B_0x0

Description

PSSI interrupt enable register

Fields

OVR_IE

Data buffer overrun/underrun interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated if either an overrun or an underrun error occurred.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32