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stm32 /stm32h7rs /STM32H7S /PWR /PWR_PDCRO

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Interpret as PWR_PDCRO

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PDO0)PDO0 0 (PDO1)PDO1 0 (PDO2)PDO2 0 (PDO3)PDO3 0 (PDO4)PDO4

Description

PWR port O pull-down control register

Fields

PDO0

Port O pull-down bit y When set, each bit activates the pull-down on POy when the APC bit is set in PWR_APCR.
PDO1

Port O pull-down bit y When set, each bit activates the pull-down on POy when the APC bit is set in PWR_APCR.
PDO2

Port O pull-down bit y When set, each bit activates the pull-down on POy when the APC bit is set in PWR_APCR.
PDO3

Port O pull-down bit y When set, each bit activates the pull-down on POy when the APC bit is set in PWR_APCR.
PDO4

Port O pull-down bit y When set, each bit activates the pull-down on POy when the APC bit is set in PWR_APCR.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32