USBPHYCLPEN=B_0x0, OTGHSLPEN=B_0x0, ETH1TXLPEN=B_0x0, ETH1RXLPEN=B_0x0, ADFLPEN=B_0x0, ADC12LPEN=B_0x0, ETH1MACLPEN=B_0x0, GPDMA1LPEN=B_0x0, USBPDCTRL=B_0x0, OTGFSLPEN=B_0x0
RCC AHB1 low-power clock enable register
| GPDMA1LPEN | GPDMA1 clock enable in low-power mode Set and reset by software. 0 (B_0x0): GPDMA1 clock disabled in low-power mode 1 (B_0x1): GPDMA1 clock enabled in low-power mode (default after reset) |
| ADC12LPEN | ADC1 and 2 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the ADC1 and 2 are the kernel clock selected by ADCSEL and provided to ADCx_CK input, and the rcc_hclk1 bus interface clock. 0 (B_0x0): ADC1 and 2 peripheral clocks disabled in low-power mode 1 (B_0x1): ADC1 and 2 peripheral clocks enabled in low-power mode (default after reset) |
| ETH1MACLPEN | ETH1 MAC peripheral clock enable in low-power mode Set and reset by software. 0 (B_0x0): ETH1 MAC peripheral clock disabled in low-power mode 1 (B_0x1): ETH1 MAC peripheral clock enabled in low-power mode (default after reset) |
| ETH1TXLPEN | ETH1 transmission peripheral clock enable in low-power mode Set and reset by software. 0 (B_0x0): ETH1 transmission peripheral clock disabled in low-power mode 1 (B_0x1): ETH1 transmission peripheral clock enabled in low-power mode (default after reset) |
| ETH1RXLPEN | ETH1 reception peripheral clock enable in low-power mode Set and reset by software. 0 (B_0x0): ETH1 reception peripheral clock disabled in low-power mode 1 (B_0x1): ETH1 reception peripheral clock enabled in low-power mode (default after reset) |
| USBPDCTRL | USBPHYC common block power-down control Set and reset by software. 0 (B_0x0): In SUSPEND, PHY state machine, bias and USBPHYC PLL remain powered (default after reset). 1 (B_0x1): In SUSPEND, PHY state machine, bias and USBPHYC PLL are powered down. |
| OTGHSLPEN | OTGHS peripheral clock enable in low-power mode Set and reset by software. 0 (B_0x0): OTGHS peripheral clock disabled in low-power mode 1 (B_0x1): OTGHS peripheral clock enabled in low-power mode (default after reset) |
| USBPHYCLPEN | USBPHYC peripheral clock enable in low-power mode Set and reset by software. 0 (B_0x0): USBPHYC peripheral clock disabled in low-power mode 1 (B_0x1): USBPHYC peripheral clock enabled in low-power mode (default after reset) |
| OTGFSLPEN | OTGFS clock enable in low-power mode Set and reset by software. 0 (B_0x0): OTGFS peripheral clock disabled in low-power mode 1 (B_0x1): OTGFS peripheral clock enabled in low-power mode (default after reset) |
| ADFLPEN | ADF clock enable in low-power mode Set and reset by software. 0 (B_0x0): ADF peripheral clock disabled in low-power mode 1 (B_0x1): ADF peripheral clock enabled in low-power mode (default after reset) |