stm32 /stm32h7rs /STM32H7S /RCC /RCC_AHB4ENR

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Interpret as RCC_AHB4ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPIOAEN 0 (B_0x0)GPIOBEN 0 (B_0x0)GPIOCEN 0 (B_0x0)GPIODEN 0 (B_0x0)GPIOEEN 0 (B_0x0)GPIOFEN 0 (B_0x0)GPIOGEN 0 (B_0x0)GPIOHEN 0 (B_0x0)GPIOMEN 0 (B_0x0)GPIONEN 0 (B_0x0)GPIOOEN 0 (B_0x0)GPIOPEN 0 (B_0x0)CRCEN 0 (B_0x0)BKPRAMEN

BKPRAMEN=B_0x0, GPIOMEN=B_0x0, GPIOPEN=B_0x0, GPIOHEN=B_0x0, GPIOGEN=B_0x0, GPIOFEN=B_0x0, GPIOEEN=B_0x0, CRCEN=B_0x0, GPIONEN=B_0x0, GPIODEN=B_0x0, GPIOOEN=B_0x0, GPIOCEN=B_0x0, GPIOBEN=B_0x0, GPIOAEN=B_0x0

Description

RCC AHB4 clock enable register

Fields

GPIOAEN

GPIOA peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOA peripheral clock disabled (default after reset)

1 (B_0x1): GPIOA peripheral clock enabled

GPIOBEN

GPIOB peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOB peripheral clock disabled (default after reset)

1 (B_0x1): GPIOB peripheral clock enabled

GPIOCEN

GPIOC peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOC peripheral clock disabled (default after reset)

1 (B_0x1): GPIOC peripheral clock enabled

GPIODEN

GPIOD peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOD peripheral clock disabled (default after reset)

1 (B_0x1): GPIOD peripheral clock enabled

GPIOEEN

GPIOE peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOE peripheral clock disabled (default after reset)

1 (B_0x1): GPIOE peripheral clock enabled

GPIOFEN

GPIOF peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOF peripheral clock disabled (default after reset)

1 (B_0x1): GPIOF peripheral clock enabled

GPIOGEN

GPIOG peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOG peripheral clock disabled (default after reset)

1 (B_0x1): GPIOG peripheral clock enabled

GPIOHEN

GPIOH peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOH peripheral clock disabled (default after reset)

1 (B_0x1): GPIOH peripheral clock enabled

GPIOMEN

GPIOM peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOM peripheral clock disabled (default after reset)

1 (B_0x1): GPIOM peripheral clock enabled

GPIONEN

GPION peripheral clock enable Set and reset by software.

0 (B_0x0): GPION peripheral clock disabled (default after reset)

1 (B_0x1): GPION peripheral clock enabled

GPIOOEN

GPIOO peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOO peripheral clock disabled (default after reset)

1 (B_0x1): GPIOO peripheral clock enabled

GPIOPEN

GPIOP peripheral clock enable Set and reset by software.

0 (B_0x0): GPIOP peripheral clock disabled (default after reset)

1 (B_0x1): GPIOP peripheral clock enabled

CRCEN

CRC clock enable Set and reset by software.

0 (B_0x0): CRC clock disabled (default after reset)

1 (B_0x1): CRC clock enabled

BKPRAMEN

Backup RAM clock enable Set and reset by software.

0 (B_0x0): Backup RAM clock disabled (default after reset)

1 (B_0x1): Backup RAM clock enabled

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