TIM17EN=B_0x0, SPI1EN=B_0x0, TIM15EN=B_0x0, TIM16EN=B_0x0, SAI1EN=B_0x0, SPI5EN=B_0x0, TIM9EN=B_0x0, USART1EN=B_0x0, TIM1EN=B_0x0, SAI2EN=B_0x0, SPI4EN=B_0x0
RCC APB2 clock enable register
| TIM1EN | TIM1 peripheral clock enable Set and reset by software. 0 (B_0x0): TIM1 peripheral clock disabled (default after reset) 1 (B_0x1): TIM1 peripheral clock enabled |
| USART1EN | USART1 peripheral clocks enable Set and reset by software. The peripheral clocks of the USART1 are the kernel clock selected by USART1SEL, and the pclk2 bus interface clock. 0 (B_0x0): USART1 peripheral clocks disabled (default after reset) 1 (B_0x1): USART1 peripheral clocks enabled: |
| SPI1EN | SPI2S1 Peripheral Clocks Enable Set and reset by software. The peripheral clocks of the SPI2S1 are: the kernel clock selected by SPI1SEL, and the pclk2 bus interface clock. 0 (B_0x0): SPI2S1 peripheral clocks disabled (default after reset) 1 (B_0x1): SPI2S1 peripheral clocks enabled: |
| SPI4EN | SPI4 Peripheral Clocks Enable Set and reset by software. The peripheral clocks of the SPI4 are: the kernel clock selected by SPI45SEL, and the pclk2 bus interface clock. 0 (B_0x0): SPI4 peripheral clocks disabled (default after reset) 1 (B_0x1): SPI4 peripheral clocks enabled: |
| TIM15EN | TIM15 peripheral clock enable Set and reset by software. 0 (B_0x0): TIM15 peripheral clock disabled (default after reset) 1 (B_0x1): TIM15 peripheral clock enabled |
| TIM16EN | TIM16 peripheral clock enable Set and reset by software. 0 (B_0x0): TIM16 peripheral clock disabled (default after reset) 1 (B_0x1): TIM16 peripheral clock enabled |
| TIM17EN | TIM17 peripheral clock enable Set and reset by software. 0 (B_0x0): TIM17 peripheral clock disabled (default after reset) 1 (B_0x1): TIM17 peripheral clock enabled |
| TIM9EN | TIM9 peripheral clock enable Set and reset by software. 0 (B_0x0): TIM9 peripheral clock disabled (default after reset) 1 (B_0x1): TIM9 peripheral clock enabled |
| SPI5EN | SPI5 peripheral clocks enable Set and reset by software. The peripheral clocks of the SPI5 are the kernel clock selected by SPI45SEL, and the pclk2 bus interface clock. 0 (B_0x0): SPI5 peripheral clocks disabled (default after reset) 1 (B_0x1): SPI5 peripheral clocks enabled: |
| SAI1EN | SAI1 peripheral clocks enable Set and reset by software. The peripheral clocks of the SAI1 are the kernel clock selected by SAI1SEL, and the pclk2 bus interface clock. 0 (B_0x0): SAI1 peripheral clocks disabled (default after reset) 1 (B_0x1): SAI1 peripheral clocks enabled: |
| SAI2EN | SAI2 peripheral clocks enable Set and reset by software. The peripheral clocks of the SAI2 are the kernel clock selected by SAI2SEL, and the pclk2 bus interface clock. 0 (B_0x0): SAI2 peripheral clocks disabled (default after reset) 1 (B_0x1): SAI2 peripheral clocks enabled: |