COMP_CODESEL=B_0x0, OCTO2_IOHSLV=B_0x0, OCTO2_COMP_CODESEL=B_0x0, IOHSLV=B_0x0, COMP_EN=B_0x0, OCTO2_COMP_EN=B_0x0, COMP_RDY=B_0x0, OCTO1_COMP_CODESEL=B_0x0, OCTO1_COMP_RDY=B_0x0, OCTO2_COMP_RDY=B_0x0, OCTO1_COMP_EN=B_0x0, OCTO1_IOHSLV=B_0x0
SBS I/O compensation cell control and status register
| COMP_EN | Compensation cell enable Set this bit to enable the compensation cell. 0 (B_0x0): Compensation cell disabled 1 (B_0x1): Compensation cell enabled |
| COMP_CODESEL | Compensation cell code selection This bit selects the code to be applied for the I/O compensation cell. 0 (B_0x0): Code from the cell (available in the SBS_CCVALR) 1 (B_0x1): Code from the SBS software value register (SBS_CCSWVALR) |
| OCTO1_COMP_EN | XSPIM_P1 compensation cell enable Set this bit to enable the XSPIM_P1 compensation cell. 0 (B_0x0): XSPIM_P1 compensation cell disabled 1 (B_0x1): XSPIM_P1 compensation cell enabled |
| OCTO1_COMP_CODESEL | XSPIM_P1 compensation cell code selection This bit selects the code to be applied for the XSPIM_P1 I/O compensation cell. 0 (B_0x0): Code from the cell (available in the SBS_CCVALR) 1 (B_0x1): Code from the SBS software value register (SBS_CCSWVALR) |
| OCTO2_COMP_EN | XSPIM_P2 compensation cell enable Set this bit to enable the XSPIM_P2 compensation cell. 0 (B_0x0): XSPIM_P2 compensation cell disabled 1 (B_0x1): XSPIM_P2 compensation cell enabled |
| OCTO2_COMP_CODESEL | XSPIM_P2 compensation cell code selection This bit selects the code to be applied for the XSPIM_P2 I/O compensation cell. 0 (B_0x0): Code from the cell (available in the SBS_CCVALR) 1 (B_0x1): Code from the SBS software value register (SBS_CCSWVALR) |
| COMP_RDY | Compensation cell ready This bit provides the status of the compensation cell. 0 (B_0x0): I/O compensation cell not ready 1 (B_0x1): I/O compensation cell ready. The code value provided by the cell can be used. |
| OCTO1_COMP_RDY | XSPIM_P1 compensation cell ready This bit provides the status of the XSPIM_P1 compensation cell. 0 (B_0x0): XSPIM_P1 I/O compensation cell not ready 1 (B_0x1): XSPIM_P1 I/O compensation cell ready. The code value provided by the cell can be used. |
| OCTO2_COMP_RDY | XSPIM_P2 compensation cell ready This bit provides the status of the XSPIM_P2 compensation cell. 0 (B_0x0): XSPIM_P2 I/O compensation cell not ready 1 (B_0x1): XSPIM_P2 I/O compensation cell ready. The code value provided by the cell can be used. |
| IOHSLV | I/O high speed at low voltage When this bit is set, the speed of the I/Os is optimized when the device voltage is low. This bit is active only if VDDIO_HSLV user option bit is set in FLASH. It must be used only if the device supply voltage is below 2.7 V. Setting this bit when VDD is higher than 2.7 V may be destructive. 0 (B_0x0): No I/O speed optimization when device voltage is low 1 (B_0x1): I/O speed optimized when device voltage is low, if VDDIO_HSLV user option is set (no effect otherwise) |
| OCTO1_IOHSLV | XSPIM_P1 I/O high speed at low voltage When this bit is set, the speed of the XSPIM_P1 I/Os is optimized when the device voltage is low. This bit is active only if OCTO1_HSLV user option bit is set in FLASH. This bit must be used only if the device supply voltage is below 2.7 V. Setting this bit when VDD is higher than 2.7 V may be destructive. 0 (B_0x0): No XSPIM_P1 I/O speed optimization when device voltage is low 1 (B_0x1): XSPIM_P1 I/O speed optimized when device voltage is low, if OCTO1_HSLV user option is set (no effect otherwise) |
| OCTO2_IOHSLV | XSPIM_P2 I/O high speed at low voltage When this bit is set, the speed of the XSPIM_P2 I/Os is optimized when the device voltage is low. This bit is active only if OCTO2_HSLV user option bit is set in FLASH. This bit must be used only if the device supply voltage is below 2.7 V. Setting this bit when VDD is higher than 2.7 V may be destructive. 0 (B_0x0): No XSPIM_P2 I/O speed optimization when device voltage is low 1 (B_0x1): XSPIM_P2 I/O speed optimized when device voltage is low, if OCTO2_HSLV user option is set (no effect otherwise) |