BOOSTEN=B_0x0, FMPLUS_PB7=B_0x0, ETH_PHYSEL=B_0x0, FMPLUS_PB6=B_0x0, FMPLUS_PB9=B_0x0, BOOSTVDDSEL=B_0x0, FMPLUS_PB8=B_0x0, AXIRAM_WS=B_0x0
SBS product mode and configuration register
FMPLUS_PB6 | Fast-mode Plus on PB(6) 0 (B_0x0): Fast-mode Plus mode disabled on PB(6) 1 (B_0x1): Fast-mode Plus mode enabled on PB(6) |
FMPLUS_PB7 | Fast-mode Plus on PB(7) 0 (B_0x0): Fast-mode Plus mode disabled on PB(7) 1 (B_0x1): Fast mode plus mode enabled on PB(7) |
FMPLUS_PB8 | Fast-mode Plus on PB(8) 0 (B_0x0): Fast-mode Plus mode disabled on PB(8) 1 (B_0x1): Fast-mode Plus mode enabled on PB(8) |
FMPLUS_PB9 | Fast-mode Plus on PB(9) 0 (B_0x0): I2C Fast-mode Plus mode disabled on PB(9) 1 (B_0x1): Fast-mode Plus mode enabled on PB(9) |
BOOSTEN | booster enable Set this bit to reduce the THD of the analog switches when the supply voltage is below 2.7 V. guaranteeing the same performance as with the full voltage range. To avoid current consumption due to booster activation when VDDA < 2.7 V and VDD > 2.7 V, VDD can be selected as supply voltage for analog switches by setting BOOSTVDDSEL bit in SBS_PMCR. In this case, the BOOSTEN bit must be cleared to avoid unwanted power consumption. 0 (B_0x0): Booster disabled 1 (B_0x1): Booster enabled |
BOOSTVDDSEL | booster VDD selection This bit selects the analog switch supply voltage, between VDD, VDDA and booster. To avoid current consumption due to booster activation when VDDA < 2.7 V and VDD > 2.7 V, VDD can be selected as supply voltage for analog switches. In this case, the BOOSTEN bit must be cleared to avoid unwanted power consumption. When both VDD and VDDA are below 2.7 V, the booster is still needed to obtain full AC performances from the I/O analog switches. 0 (B_0x0): VDDA selected as analog switch booster voltage supply (when BOOSTEN bit is cleared) 1 (B_0x1): VDD selected as analog switch booster voltage supply |
ETH_PHYSEL | Ethernet PHY interface selection Other: reserved 0 (B_0x0): GMII or MII 4 (B_0x4): RMII |
AXIRAM_WS | AXIRAM wait state Set this bit to add one wait state to all AXIRAMs when ECC = 0. When ECC = 1 there is one wait state by default. 0 (B_0x0): No wait state added when accessing any AXIRAM with ECC = 0 1 (B_0x1): One wait state added when accessing any AXIRAM with ECC = 0. In this case, Fmax = 500 MHz is not guaranteed. (TBC) |