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stm32 /stm32h7rs /STM32H7S /SDMMC1 /SDMMC_ACKTIMER

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Interpret as SDMMC_ACKTIMER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ACKTIME

Description

SDMMC acknowledgment timer register

Fields

ACKTIME

Boot acknowledgment timeout period This bit can only be written by firmware when CPSM is disabled (CPSMEN = 0). Boot acknowledgment timeout period expressed in card bus clock periods.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32