Regviz

stm32 /stm32h7rs /STM32H7S /SDMMC1 /SDMMC_IDMACTRLR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SDMMC_IDMACTRLR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h5/STM32H562/SDMMC1/SDMMC_IDMACTRLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)IDMAEN 0 (B_0x0)IDMABMODE

IDMABMODE=B_0x0, IDMAEN=B_0x0

Description

SDMMC DMA control register

Fields

IDMAEN

IDMA enable This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

0 (B_0x0): IDMA disabled

1 (B_0x1): IDMA enabled
IDMABMODE

Buffer mode selection This bit can only be written by firmware when DPSM is inactive (DPSMACT = 0).

0 (B_0x0): Single buffer mode.

1 (B_0x1): Linked list mode.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32