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stm32 /stm32h7rs /STM32H7S /TIM12 /TIM12_CNT

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Interpret as TIM12_CNT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CNT0 (UIFCPY)UIFCPY

Description

TIM12 counter

Fields

CNT

Counter value Non-dithering mode (DITHEN = 0) The register holds the counter value. Dithering mode (DITHEN = 1) The register only holds the non-dithered part in CNT[15:0]. The fractional part is not available.
UIFCPY

UIF Copy This bit is a read-only copy of the UIF bit in the TIMx_ISR register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32