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stm32 /stm32h7rs /STM32H7S /TIM6 /TIM6_ARR

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Interpret as TIM6_ARR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ARR

Description

TIM6 auto-reload register

Fields

ARR

Auto-reload value ARR is the value to be loaded into the actual auto-reload register. Refer to Section 66.3.4: Time-base unit on page 3923 for more details about ARR update and behavior. The counter is blocked while the auto-reload value is null. Non-dithering mode (DITHEN = 0) The register holds the auto-reload value in ARR[15:0]. The ARR[19:16] bits are reserved. Dithering mode (DITHEN = 1) The register holds the integer part in ARR[19:4]. The ARR[3:0] bitfield contains the dithered part.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32