stm32 /stm32l0 /STM32L062 /LPUSART1 /CR2

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Interpret as CR2

31282724232019161512118743000000000000000000000000000000000000000000 (ADDM7)ADDM70 (CLKEN)CLKEN0STOP0 (SWAP)SWAP0 (RXINV)RXINV0 (TXINV)TXINV0 (TAINV)TAINV0 (MSBFIRST)MSBFIRST0ADD0_30ADD4_7

Description

Control register 2

Fields

ADDM7

7-bit Address Detection/4-bit Address Detection

CLKEN

Clock enable

STOP

STOP bits

SWAP

Swap TX/RX pins

RXINV

RX pin active level inversion

TXINV

TX pin active level inversion

TAINV

Binary data inversion

MSBFIRST

Most significant bit first

ADD0_3

Address of the USART node

ADD4_7

Address of the USART node

Links

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