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stm32 /stm32l0 /STM32L063 /NVIC /IPR0

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Interpret as IPR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PRI_00PRI_10PRI_20PRI_3

Description

Interrupt Priority Register 0

Fields

PRI_0

priority for interrupt 0
PRI_1

priority for interrupt 1
PRI_2

priority for interrupt 2
PRI_3

priority for interrupt 3

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32