Regviz

stm32 /stm32l0 /STM32L063 /SCB /VTOR

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Interpret as VTOR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TBLOFF

Description

Vector table offset register

Fields

TBLOFF

Vector table base offset field

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32