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stm32 /stm32l0 /STM32L0x1 /ADC /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADEN)ADEN 0 (ADDIS)ADDIS 0 (ADSTART)ADSTART 0 (ADSTP)ADSTP 0 (ADVREGEN)ADVREGEN 0 (ADCAL)ADCAL

Description

control register

Fields

ADEN

ADC enable command
ADDIS

ADC disable command
ADSTART

ADC start conversion command
ADSTP

ADC stop conversion command
ADVREGEN

ADC Voltage Regulator Enable
ADCAL

ADC calibration

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32