Regviz

stm32 /stm32l0 /STM32L0x1 /ADC /TR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TR

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https://regviz.com/r/stm32/stm32l0/STM32L0x3/ADC/TR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LT0HT

Description

watchdog threshold register

Fields

LT

Analog watchdog lower threshold
HT

Analog watchdog higher threshold

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32