stm32 /stm32l0 /STM32L0x1 /LPTIM /CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CR

31282724232019161512118743000000000000000000000000000000000000000000 (ENABLE)ENABLE0 (SNGSTRT)SNGSTRT0 (CNTSTRT)CNTSTRT

Description

Control Register

Fields

ENABLE

LPTIM Enable

SNGSTRT

LPTIM start in single mode

CNTSTRT

Timer start in continuous mode

Links

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