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stm32 /stm32l0 /STM32L0x1 /LPUART1 /ISR

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Interpret as ISR

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https://regviz.com/r/stm32/stm32l0/STM32L053/LPUSART1/ISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (FE)FE 0 (NF)NF 0 (ORE)ORE 0 (IDLE)IDLE 0 (RXNE)RXNE 0 (TC)TC 0 (TXE)TXE 0 (CTSIF)CTSIF 0 (CTS)CTS 0 (BUSY)BUSY 0 (CMF)CMF 0 (SBKF)SBKF 0 (RWU)RWU 0 (WUF)WUF 0 (TEACK)TEACK 0 (REACK)REACK

Description

Interrupt & status register

Fields

PE

PE
FE

FE
NF

NF
ORE

ORE
IDLE

IDLE
RXNE

RXNE
TC

TC
TXE

TXE
CTSIF

CTSIF
CTS

CTS
BUSY

BUSY
CMF

CMF
SBKF

SBKF
RWU

RWU
WUF

WUF
TEACK

TEACK
REACK

REACK

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32